Hi, everyone
i have a question about Adaptive Multi-Axis Step-Smoothing(AMASS) levels what is the performance difference when we use 32-bit timer @60 Mhz where i have these points to clear
1)-> native GRBL core run on 16Mhz on avr controller and uses 16-bit timer for step generation timing
2)-> with use of AMASS level 4 , four Timer ISR calls generate one step Pulse generation So it add computation load four times per step Pulse generation
what is the difference when we use 32-bit timer for step generation (actually i am porting the GRBL CORE to PIC32 mcu family which has 32-bit timer and running on 60 Mhz ) where we have more higher resolution for time slicing and longer time can be measured with 32-bit timer ie, max count value of 4294967295 and dividing by 60Mhz clock gives 71 seconds pulse step per timer overflow
so experts please put a light on it